32KB Data Memory XCVC1902-1LSIVSVD Dual ARM Field Programmable Gate Array
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32KB Data Memory XCVC1902-1LSIVSVD Dual ARM Field Programmable Gate Array
Product Description Of XCVC1902-1LSIVSVD XCVC1902-1LSIVSVD has 48KB of instruction L1 cache and 32KB of data L1 cache, with parity and ECC protection respectively; a NEON SIMD engine; and a single and double precision floating point unit.In addition to these blocks, the APU consists of a snoop control unit and a 1MB L2 cache with ECC protection to enhance system-level performance.
Specification Of XCVC1902-1LSIVSVD
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