Integrated Circuit Chip EP4CE10F17C8N Low Power Field Programmable Gate Array IC
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Integrated Circuit Chip EP4CE10F17C8N Low Power Field Programmable Gate Array IC
Product Description Of EP4CE10F17C8N EP4CE10F17C8N's I/O performance supports several system interfaces, such as the high-speed I/O interface, external memory interface, and the PCI/PCI-X bus interface. I/Os using the SSTL-18 Class I termination standard can achieve up to the stated DDR2 SDRAM interfacing speeds. I/Os using general-purpose I/O standards such as 3.3-, 3.0-,2.5-,1.8-, or 1.5-LVTTL/LVCMOS are capable of a typical 200 MHz interfacing frequency with a 10 pF load.
Product Attributes Of EP4CE10F17C8N
Receiver Input Waveform Of EP4CE10F17C8N
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