China Integrated Circuit Chip manufacturer
ShenZhen Mingjiada Electronics Co.,Ltd.
Shenzhen Mingjiada Electronics Co., Ltd.
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High Performance A3P250-FGG256I Low Power Programmable Logic IC 256-LBGA Package

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ShenZhen Mingjiada Electronics Co.,Ltd.

City: shenzhen

Country/Region:china

Tel:86-0755-83294757

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Mr.Sales Manager
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High Performance A3P250-FGG256I Low Power Programmable Logic IC 256-LBGA Package

Brand Name Original Factory
Model Number A3P250-FGG256I
Certification Lead free / RoHS Compliant
Place of Origin CN
Minimum Order Quantity 10
Price Contact for Sample
Payment Terms T/T, L/C, Western Union
Delivery Time 5-8 work days
Packaging Details 256-LBGA
Part Number A3P250-FGG256I
System Performance 350 MHz
PCI 64-Bit
System Gates 15K to 1M
True Dual-Port SRAM Up to 144 Kbits
DDR 700 Mbps
Detailed Product Description

High Performance A3P250-FGG256I Low Power Programmable Logic IC 256-LBGA Package

 

Product Description Of A3P250-FGG256I

A3P250-FGG256I devices support the ARM Cortex-M1 processor.The ARM-enabled devices have Microchip ordering numbers that begin with M1A3P (Cortex-M1) and do not support AES decryption.A3P250-FGG256I have no PLL or RAM support.ProASIC 3 devices have up to 1 million system gates,supported with up to 144 kbits of true dual-port SRAM and up to 300 user I/Os.

 

Product Attributes Of A3P250-FGG256I

Part Number

A3P250-FGG256I

3000 LE

157 I/O

1.425 V

1.575 V

- 40 C

+ 100 C

 

Feature Of A3P250-FGG256I

  • 700 Mbps DDR, LVDS-Capable I/Os (A3P250 and above)

  • 1.5V, 1.8V, 2.5V, and 3.3V Mixed-Voltage Operation

  • Wide Range Power Supply Voltage Support per JESD8-B, Allowing I/Os to Operate from 2.7V to 3.6V

  • Bank-Selectable I/O Voltages—up to 4 Banks per Chip

  • Single-Ended I/O Standards: LVTTL, LVCMOS 3.3V/2.5V/1.8V/1.5V, 3.3V PCI/3.3V PCI-X, and LVCMOS 2.5V/5.0V Input

  • Differential I/O Standards: LVPECL, LVDS, B-LVDS, and M-LVDS (A3P250 and above)

  • I/O Registers on Input, Output, and Enable Paths

  • Hot-Swappable and Cold Sparing I/Os

  • Supported only by A3P030 devices.

  • Programmable Output Slew Rate and Drive Strength

  • Weak Pull-Up/-Down

  • IEEE 1149.1 (JTAG) Boundary Scan Test

  • Pin-Compatible Packages across the ProASIC 3 Family

 

Output Buffer Model And Delays Of A3P250-FGG256I

 

FAQ
Q. Are your products original?
A: Yes, all products are original, new original import is our purpose.
Q:Which Certificates do you have?
A:We are ISO 9001:2015 Certified Company and member of ERAI.
Q:Can you support small quantity order or sample?Is the sample free?
A:Yes,we support sample order and small order.Sample cost is different according to your order or project.
Q:How to ship my order? Is it safe?
A:We use express to ship,such as DHL,Fedex,UPS,TNT,EMS.We can also use your suggested forwarder.Products will be in good packing and ensure the safety and we are responsible to product damage to your order.
Q:What about the lead time?
A:We can ship stock parts within 5 working days.If without stock,we will confirm lead time for you based on your order quantity.

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