8 Bit Shift 3 State Output Registers Integrated Semiconductor SN74HC595DR

8 Bit Shift 3 State Output Registers Integrated Semiconductor SN74HC595DR

♦Operating Voltage Range of 4.5 V to 5.5 V

♦ Outputs Can Drive Up To 10 LSTTL Loads

♦Low Power Consumption, 20-µA Max ICC

♦Typical tpd = 13 ns

♦±4-mA Output Drive at 5 V

♦Low Input Current of 1 µA Max

♦Inputs Are TTL-Voltage Compatible

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†

Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . .  –0.5 V to 7 V

Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . .±20 mA

Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) . . . . . . . . . . . . . . . . . ..±20 mA

Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . . . . . . . . ±50 mA

Package thermal impedance, θJA (see Note 2):

D package 86 . . . . . . . . . . . . . . . .  . . . . . . . .°C/W

N package 80 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . °C/W

NS package 76 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . °C/W

PW package 113 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . °C/W

Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . –65°C to 150°C

NOTES:

A. CL includes probe and test-fixture capacitance.

B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns.

C. The outputs are measured one at a time with one input transition per measurement.

D. tPLH and tPHL are the same as tpd.

Figure 1. Load Circuit and Voltage Waveforms

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