SN74HC04N Electronic IC Chips integrated components Hex inverter
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74HC04; 74HCT04 Hex inverter
FEATURES • Complies with JEDEC standard no. 8-1A • ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V. • Specified from −40 to +85 °C and −40 to +125 °C.
DESCRIPTION The 74HC/HCT04 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT04 provide six inverting buffers.
QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf ≤ 6.0 ns.
Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = total load switching outputs; Σ(CL × VCC2 × fo) = sum of the outputs. 2. For 74HC04: the condition is VI = GND to VCC. For 74HCT04: the condition is VI = GND to VCC − 1.5 V.
Fig.1 Pin configuration DIP14, SO14 and (T)SSOP14.
Fig.2 Pin configuration DHVQFN14. Fig.3 Logic symbol.
Fig.4 IEC logic symbol. Fig.5 Logic diagram (one inverter).
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Product Tags: electronic integrated circuit linear integrated circuits |