74HC08D Electronic IC Chips integrated components Quad 2 - input AND gate

Quad 2-input AND gate 74HC08; 74HCT08

FEATURES

• Complies with JEDEC standard no. 8-1A

• ESD protection:

  HBM EIA/JESD22-A114-A exceeds 2000 V

  MM EIA/JESD22-A115-A exceeds 200 V.

• Specified from −40 to +85 °C and −40 to +125 °C.

DESCRIPTION

The 74HC/HCT08 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT08 provide the 2-input AND function.

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).

Notes

1. For DIP14 packages: above 70 °C derate linearly with 12 mW/K.

2. For SO14 packages: above 70 °C derate linearly with 8 mW/K.

    For SSOP14 and TSSOP14 packages: above 60 °C derate linearly with 5.5 mW/K.

    For DHVQFN14 packages: above 60 °C derate linearly with 4.5 mW/K.

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