Xilinx Programmable IC Chips XCVU3P-2FFVC1517I

Xilinx Ic Chip Programmer XCVU3P-2FFVC1517I 560 I/O 49260 LAB XCVU3P 40 Transceiver

Specifications 

Description

Xilinx® UltraScale™ architecture comprises high-performance FPGA, MPSoC, and RFSoC families that address a vast spectrum of system requirements with a focus on lowering total power consumption through numerous innovative technological advancements. Artix® UltraScale+ FPGAs: Highest serial bandwidth and signal compute density in a cost-optimized device for critical networking applications, vision and video processing, and secured connectivity.

Kintex® UltraScale FPGAs: High-performance FPGAs with a focus on price/performance, using both monolithic and next-generation stacked silicon interconnect (SSI) technology. High DSP and block RAM-to-logic ratios and next-generation transceivers, combined with low-cost packaging, enable an optimum blend of capability and cost.

Kintex UltraScale+™ FPGAs: Increased performance and on-chip UltraRAM memory to reduce BOM cost. The ideal mix of high-performance peripherals and cost-effective system implementation.

Kintex UltraScale+ FPGAs have numerous power options that deliver the optimal balance between the required system performance and the smallest power envelope. Virtex® UltraScale FPGAs: High-capacity, high-performance FPGAs enabled using both monolithic and next-generation SSI technology. Virtex UltraScale devices achieve the highest system capacity, bandwidth, and performance to address key market and application requirements through integration of various system-level functions.

Virtex UltraScale+ FPGAs: The highest transceiver bandwidth, highest DSP count, and highest on-chip and in-package memory available in the UltraScale architecture.

Virtex UltraScale+ FPGAs also provide numerous power options that deliver the optimal balance between the required

system performance and the smallest power envelope. Zynq® UltraScale+ MPSoCs: Combine the Arm® v8-based

Cortex®-A53 high-performance energy-efficient 64-bit application processor with the Arm Cortex-R5F real-time processor

and the UltraScale architecture to create the industry's first programmable MPSoCs. Provide unprecedented power savings,

heterogeneous processing, and programmable acceleration.

Zynq® UltraScale+ RFSoCs: Combine RF data converter subsystem and forward error correction with industry-leading

programmable logic and heterogeneous processing capability. Integrated RF-ADCs, RF-DACs, and soft decision

FECs (SD-FEC) provide the key subsystems for multiband, multi-mode cellular radios and cable infrastructure.

Features

Most Zynq UltraScale+ RFSoCs include an RF data converter subsystem, which contains multiple radio frequency

analog to digital converters (RF-ADCs) and multiple radio frequency digital to analog converters (RF-DACs). The

high-precision, high-speed, power efficient RF-ADCs and RF-DACs can be individually configured for real data or

in most cases can be configured in pairs for real and imaginary I/Q data. See RF-ADCs and RF-DACs sections

Some Zynq UltraScale+ RFSoCs include highly flexible soft decision FEC blocks for decoding and encoding data

as a means to control errors in data transmission over unreliable or noisy communication channels. The SD-FEC

blocks support low-density parity check (LDPC) decode/encode and Turbo decode for use in 5G wireless, backhaul,

DOCSIS, and LTE applications.

Zynq UltraScale+ MPSoCs and RFSoCs feature dual and quad core variants of the Arm Cortex-A53 (APU) with dual-core

Arm Cortex-R5F (RPU) processing system (PS). Some devices also include a dedicated Arm Mali™-400 MP2 graphics

processing unit (GPU).

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