W9725G8KB-25 TR IC DRAM 256MBIT PARALLEL 60WBGA Winbond Electronics
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Detailed Product Description
Product Details
GENERAL DESCRIPTIONThe W9725G8JB is a 256M bits DDR2 SDRAM, organized as 8,388,608 words x 4 banks x 8 bits. This device achieves high speed transfer rates up to 1066Mb/sec/pin (DDR2-1066) for general applications. W9725G8JB is sorted into the following speed grades: -18, -25, 25I and -3. The -18 is compliant to the DDR2-1066 (7-7-7) specification. The -25/25I are compliant to the DDR2-800 (5-5-5) or DDR2-800 (6-6-6) specification (the 25I industrial grade which is guaranteed to support -40°C ≤ TCASE ≤ 95°C). The -3 is compliant to the DDR2-667 (5-5-5) specification.
FEATURES• Power Supply: VDD, VDDQ = 1.8 V ± 0.1 V• Double Data Rate architecture: two data transfers per clock cycle • CAS Latency: 3, 4, 5, 6 and 7 • Burst Length: 4 and 8 • Bi-directional, differential data strobes (DQS and DQS ) are transmitted / received with data • Edge-aligned with Read data and center-aligned with Write data • DLL aligns DQ and DQS transitions with clock • Differential clock inputs (CLK and CLK ) • Data masks (DM) for write data. • Commands entered on each positive CLK edge, data and data mask are referenced to both edges of DQS • Posted CAS programmable additive latency supported to make command and data bus efficiency • Read Latency = Additive Latency plus CAS Latency (RL = AL + CL) • Off-Chip-Driver impedance adjustment (OCD) and On-Die-Termination (ODT) for better signal quality • Auto-precharge operation for read and write bursts • Auto Refresh and Self Refresh modes • Precharged Power Down and Active Power Down • Write Data Mask • Write Latency = Read Latency - 1 (WL = RL - 1) • Interface: SSTL_18 • Packaged in WBGA 60 Ball (8X12.5 mm2), using Lead free materials with RoHS compliant
Specifications
DescriptionsSDRAM - DDR2 Memory IC 256Mb (32M x 8) Parallel 200MHz 400ps
60-WBGA (8x12.5) DRAM Chip DDR2 SDRAM 256Mbit 32Mx8 1.8V 60-Pin WBGA |
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