SOC Arm System On Chip 32bit FM3 Microcontroller Chip CY9BF121JPMC-G-JNE2

SOC System-on-chip 32-bit ARM® Cortex®-M3 FM3 Microcontroller chip CY9BF121JPMC-G-JNE2

The MB9B120J Series are highly integrated 32-bit microcontrollers dedicated for embedded controllers with low-power consumption 
mode and competitive cost. 
These series are based on the ARM® Cortex®-M3 Processor with on-chip Flash memory and SRAM, and have peripheral functions 
such as various timers, ADCs and Communication Interfaces (UART, CSIO, I2C, LIN). 
The products which are described in this data sheet are placed into TYPE10 product categories in FM3 Family Peripheral Manual. 
Features 
32-bit ARM® Cortex®-M3 Core 
 Processor version: r2p1 
 Up to 72 MHz Frequency Operation 
 Integrated Nested Vectored Interrupt Controller (NVIC): 1 
NMI (non-maskable interrupt) and 48 peripheral interrupts 
and 16 priority levels 
 24-bit System timer (Sys Tick): System timer for OS task 
management 
On-chip Memories 
[Flash memory] 
 64 Kbytes 
 Read cycle: 0 wait-cycle 
 Security function for code protection 
[SRAM] 
This Series on-chip SRAM is composed of two independent 
SRAM (SRAM0, SRAM1). SRAM0 is connected to I-code bus 
and D-code bus of Cortex-M3 core. SRAM1 is connected to 
System bus. 
 SRAM0:  4 Kbytes 
 SRAM1:  4 Kbytes 
Multi-function Serial Interface (Max four channels) 
 2 channels with 16steps×9-bit FIFO (ch.0/ch.1), 2 channels 
without FIFO (ch.2/ ch.5) 
 Operation mode is selectable from the followings for each 
channel. 
 UART 
 CSIO 
 LIN 
 I2C 
[UART] 
 Full-duplex double buffer 
 Selection with or without parity supported 
 Built-in dedicated baud rate generator 
 External clock available as a serial clock 
 Various error detection functions available (parity errors, 
framing errors, and overrun errors) 
Cypress Semiconductor Corporation    
[CSIO] 
 Full-duplex double buffer 
 Built-in dedicated baud rate generator 
 Overrun error detection function available 
[LIN] 
 LIN protocol Rev.2.1 supported 
 Full-duplex double buffer 
 Master/Slave mode supported 
 LIN break field generate (can be changed 13-bit to 16-bit 
length) 
 LIN break delimiter generate (can be changed 1-bit to 4-bit 
length) 
 Various error detect functions available (parity errors, framing 
errors, and overrun errors) 
[I2C] 
Standard-mode (Max 100 kbps) / Fast-mode (Max 400kbps) 
supported 
DMA Controller (Four channels) 
The DMA Controller has an independent bus from the CPU, so 
CPU and DMA Controller can process simultaneously. 
 4 independently configured and operated channels 
 Transfer can be started by software or request from the 
built-in peripherals 
 Transfer address area: 32-bit (4 Gbytes) 
 Transfer mode: Block transfer/Burst transfer/Demand 
transfer 
 Transfer data type: byte/half-word/word 
 Transfer block count: 1 to 16  
 Number of transfers: 1 to 65536 
MB9B120J Series 
A/D Converter (Max 8channels) 
[12-bit A/D Converter] 
 Successive Approximation type 
 Conversion time: 1.0 μs @ 5 V 
 Priority conversion available (priority at 2 levels) 
Not included the function to activate A/D by external trigger 
input 
 Scanning conversion mode 
 Built-in FIFO for conversion data storage (for SCAN 
conversion: 16 steps, for Priority conversion: 4steps) 
Base Timer (Max eight channels) 
Operation mode is selectable from the followings for each 
channel. 
 16-bit PWM timer 
 16-bit PPG timer 
 16-/32-bit reload timer 
 16-/32-bit PWC timer 
General-Purpose I/O Port  
This series can use its pins as general-purpose I/O ports when 
they are not used for peripherals. Moreover, the port relocate 
function is built-in. It can set which I/O port the peripheral 
function can be allocated to. 
 Capable of pull-up control per pin 
 Capable of reading pin level directly 
 Built-in the port relocate function 
 Up to 23 fast general-purpose I/O Ports@32pin Package 
 Some ports are 5V tolerant 
See List of Pin Functions and I/O Circuit Type to confirm the 
corresponding pins. 
Dual Timer (32-/16-bit Down Counter) 
The Dual Timer consists of two programmable 32-/16-bit down 
counters. 
Operation mode is selectable from the followings for each 
channel. 
 Free-running 
 Periodic (=Reload) 
 One-shot 
Quadrature Position/Revolution Counter (QPRC) 
(One channel) 
The Quadrature Position/Revolution Counter (QPRC) is used 
to measure the position of the position encoder. Moreover, it is 
possible to use as the up/down counter. 
 The detection edge of the three external event input pins AIN, 
BIN and ZIN is configurable. 
 16-bit position counter 
 16-bit revolution counter 
 Two 16-bit compare registers 
Multi-function Timer  
The Multi-function timer is composed of the following blocks. 
 16-bit free-run timer × 3ch. 
 Input capture × 4ch. 
 Output compare × 6ch. 
 A/D activation compare × 1ch. 
 Waveform generator × 3ch. 
 16-bit PPG timer × 3ch. 
The following function can be used to achieve the motor 
control. 
 PWM signal output function 
 DC chopper waveform output function 
 Dead time function 
 Input capture function 
 A/D convertor activate function 
 DTIF (Motor emergency stop) interrupt function 
Real-time clock (RTC) 
The Real-time clock can count 
Year/Month/Day/Hour/Minute/Second/A day of the week from 
00 to 99. 
 The interrupt function with specifying date and time 
(Year/Month/Day/Hour/Minute) is available. This function is 
also available by specifying only Year, Month, Day, Hour or 
Minute. 
 Timer interrupt function after set time or each set time. 
 Capable of rewriting the time with continuing the time count. 
 Leap year automatic count is available. 
External Interrupt Controller Unit 
 Up to 7 external interrupt input pins@32 pin Package 
 Include one non-maskable interrupt (NMI) input pin 

Packaging and transportation instructions

- According to the standard export packaging.

Customers can choose from cartons, wooden cases and wooden pallets according to their own requirements.

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